1. Field of the Invention
The present invention relates to a serial peripheral interface circuit.
2. Description of Related Art
Referring to FIG. 2, a conventional serial peripheral inter face circuit includes a host 100 and a slave 200. The host 100 includes a data output terminal MOSI, a data input terminal MISO, a serial clock terminal SCLK, a slave select terminal SS0. The slave 200 includes a data input terminal SDI connected to the data output terminal MOSI of the host 10, a data output terminal SDO connected to the data input terminal MISO of the host 10, a serial clock terminal SCLK connected to the serial clock terminal SCLK of the host 10, and a select terminal CS connected to the slave select terminal SS0 of the host 100. Therefore, the host 100 can select the slave 200 for transmitting data. However, if there is more than one slave connected to the host 100, the host 100 cannot distinguish them.